US20020008967A1 - Power module with a circuit arrangement comprising active semiconductor components and passive components, and method for producing same - Google Patents

Power module with a circuit arrangement comprising active semiconductor components and passive components, and method for producing same Download PDF

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US20020008967A1
US20020008967A1 US09/341,527 US34152799A US2002008967A1 US 20020008967 A1 US20020008967 A1 US 20020008967A1 US 34152799 A US34152799 A US 34152799A US 2002008967 A1 US2002008967 A1 US 2002008967A1
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substrate
components
active semiconductor
semiconductor components
dcb
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US6344973B1 (en
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Hans-Peter Feustel
Friedrich Loskarn
Reinhard Ruckert
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Alcatel Lucent SAS
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Alcatel SA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01067—Holmium [Ho]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Power modules are used in many application fields for various tasks, for example, to control the speed and power of electric motors.
  • a circuit arrangement acting as power unit forms part of such power modules and typically has both active semiconductor components, such as power semiconductor components, and passive components, such as resistors (e.g., shunts for current measurement) and possibly capacitors.
  • the power semiconductor components work in switched mode, which causes high rates of current change. These high rates of current change necessitate a low-inductance structure of the circuit arrangement to prevent overvoltages.
  • the carrier element used for the circuit arrangement's active semiconductor components is typically a so-called DCB (direct copper bonding) substrate, which is made of a ceramic layer enclosed by two copper layers (e.g., made of aluminum oxide Al 2 O 3 ).
  • the active semiconductor components power semiconductor components
  • the upper copper layer of the DCB substrate is structured (interrupted) to form track conductors for connecting the power semiconductor components.
  • the DCB substrate is mounted on a metal plate serving as circuit substrate, typically soldered. This metal plate transfers the heat loss to a cooling system.
  • the circuit arrangement's passive components are advantageously realized in thick film technology (i.e., printed on a ceramic substrate).
  • This ceramic substrate in a separate manufacturing step, is bonded to the circuit substrate adjacent to the DCB substrate (e.g., by means of heat conductive bonding).
  • connection (contacting) between the circuit arrangement's passive components mounted on the ceramic substrates and the active semiconductor components mounted on the DCB substrates is problematic due to the spatial separation. This requires long connecting leads and connecting lugs, which as parasitic inductances have a negative effect on the properties of the circuit arrangement or power module (generation of overvoltages, EMV problems).
  • DE 35 38 933 A1 furthermore shows a power module in which the ceramic substrate carrying the passive components is soldered directly to the DCB substrate carrying the active semiconductor components.
  • the solder connection performs a pure fixation and heat conducting function.
  • the object of the invention is to define a power module in accordance with the preamble of claim 1 with a simple structure and manufacturing process, in which these disadvantages are obviated.
  • the passive components is realized by means of thick film technology (e.g., by depositing on a ceramic substrate a first print layer as the actual component and at least one additional print layer laterally adjacent to the first print layer acting as contact surface).
  • the ceramic substrate thus printed (the thick film circuit) is placed on the upper side of the DCB substrate (the upper copper layer) suitably structured to form track conductors and connecting surfaces and is connected with the DCB substrate by soldering the contact surface(s) to the corresponding connecting surfaces of the DCB substrate.
  • Connection (contacting) with the other semiconductor components arranged on the DCB substrate can be suitably effected either directly via track conductors or via bond wires.
  • the DCB substrate is suitably connected with the circuit substrate of the circuit arrangement, e.g., soldered to this circuit substrate (e.g., a metal plate). Power dissipation of the passive components (particularly resistors) arranged on the ceramic substrate is removed via the ceramic substrate and the DCB substrate to the circuit substrate.
  • the ceramic substrates with the passive components can be soldered to the circuit substrate simultaneously to soldering the active semiconductor components and/or simultaneously to soldering the DCB substrate to the circuit substrate so that no separate process step is required.
  • soldering the thick film circuit can be executed simultaneously with soldering the active semiconductor components to the DCB substrate or simultaneously with soldering the active semiconductor components to the DCB substrate and the DCB substrate to the circuit substrate.
  • FIGURE shows a schematic view of the structure of the power module in a sectional drawing.
  • the power module's circuit arrangement 1 disposed, for example, on a circuit substrate 2 with the dimensions 99 mm ⁇ 57 mm ⁇ 3 mm comprises, for example, a plurality of power semiconductor components 11 (power transistors and power diodes) and a plurality of resistors 10 as shunts for measuring the transistor currents.
  • the carrier element provided for the power semiconductor components 11 , which are implemented as semiconductor devices, and the resistors 10 , which are realized in thick film technology, is a DCB substrate 3 , which is composed of a first copper layer 32 (structured to form track conductors and connecting surfaces), a ceramic layer 31 formed as an oxide layer, and a second (unstructured) copper layer 33 .
  • the power semiconductor components 11 e.g., the power transistors and power diodes formed as semiconductor devices (semiconductor chips), are soldered to the connecting surfaces of the first copper layer 32 (i.e., to the upper side of the DCB substrate 3 ) by means of solder 15 and are mechanically connected by this soldering process with the DCB substrate 3 (of the first copper layer 32 ) (particularly for removal of their power dissipation) and are electrically conducted via bond wires 12 .
  • the resistors 10 from the resistor track 13 , the two contact surfaces 14 laterally adjoining the resistor track 13 (metallizations), and a protective layer (passivation) (not depicted) are printed on a ceramic substrate 21 .
  • This ceramic substrate 21 is soldered to the connecting surfaces provided for this purpose on the upper side of DCB substrate 3 (first copper layer 32 ) (by means of solder 15 ).
  • this soldering process is preferably carried out simultaneously to soldering the power semiconductor components 11 onto DCB substrate 3 and DCB substrate 3 with the mounted active semiconductor components 11 and passive components 10 is subsequently soldered to circuit substrate 2 , which is formed, for example, by a metallic copper plate.

Abstract

The invention relates to a power module with a circuit arrangement provided with active semiconductor components and passive components and with a circuit substrate, whereby at least a portion of the active semiconductor components are soldered onto a DCB substrate and at least a portion of the passive components are printed in thick film technology on at least one ceramic substrate. The upper side of the DCB substrate is structured to form track conductors and connecting surfaces for receiving the active semiconductor components and passive components of the circuit arrangement. On the ceramic substrate, for each passive component, a first print layer is printed in thick film technology and at least one contact surface as additional print layer laterally adjoining the first print layer. The ceramic substrates for the passive components in thick film technology are connected via the at least one contact surface with the corresponding connecting surface(s) of the DCB substrate by means of a soldered connection.

Description

  • Power modules are used in many application fields for various tasks, for example, to control the speed and power of electric motors. A circuit arrangement acting as power unit forms part of such power modules and typically has both active semiconductor components, such as power semiconductor components, and passive components, such as resistors (e.g., shunts for current measurement) and possibly capacitors. The power semiconductor components work in switched mode, which causes high rates of current change. These high rates of current change necessitate a low-inductance structure of the circuit arrangement to prevent overvoltages. [0001]
  • Consequently, and for reasons of adequate heat removal of their power dissipation, the carrier element used for the circuit arrangement's active semiconductor components (particularly the power semiconductor components) is typically a so-called DCB (direct copper bonding) substrate, which is made of a ceramic layer enclosed by two copper layers (e.g., made of aluminum oxide Al[0002] 2O3). The active semiconductor components (power semiconductor components) are soldered to the upper copper layer of the DCB substrate and contacted by means of bond wires. The upper copper layer of the DCB substrate is structured (interrupted) to form track conductors for connecting the power semiconductor components.
  • For mechanical stabilization and heat removal, the DCB substrate is mounted on a metal plate serving as circuit substrate, typically soldered. This metal plate transfers the heat loss to a cooling system. [0003]
  • The circuit arrangement's passive components (particularly the resistors) are advantageously realized in thick film technology (i.e., printed on a ceramic substrate). This ceramic substrate, in a separate manufacturing step, is bonded to the circuit substrate adjacent to the DCB substrate (e.g., by means of heat conductive bonding). [0004]
  • The inherent disadvantage is that [0005]
  • separate process steps and technologies are required for soldering the DCB substrate and bonding the ceramic substrate to the circuit substrate, which is time-consuming and costly; [0006]
  • Connection (contacting) between the circuit arrangement's passive components mounted on the ceramic substrates and the active semiconductor components mounted on the DCB substrates is problematic due to the spatial separation. This requires long connecting leads and connecting lugs, which as parasitic inductances have a negative effect on the properties of the circuit arrangement or power module (generation of overvoltages, EMV problems). [0007]
  • DE 35 38 933 A1 furthermore shows a power module in which the ceramic substrate carrying the passive components is soldered directly to the DCB substrate carrying the active semiconductor components. Here, the solder connection performs a pure fixation and heat conducting function. Although this eliminates the additional process step of bonding, a large number of bond wires continue to be required for electric contacting of the passive components with the track conductor structure arranged on the DCB substrate. Bond wires, however are costly and susceptible to mechanical stresses. [0008]
  • The object of the invention is to define a power module in accordance with the preamble of claim [0009] 1 with a simple structure and manufacturing process, in which these disadvantages are obviated.
  • According to the invention, this object is attained by the features of claim [0010] 1.
  • Advantageous further developments of the power module and a process for its manufacture are the subject of the additional claims. [0011]
  • In the inventive power module, at least a portion of the passive components is realized by means of thick film technology (e.g., by depositing on a ceramic substrate a first print layer as the actual component and at least one additional print layer laterally adjacent to the first print layer acting as contact surface). The ceramic substrate thus printed (the thick film circuit) is placed on the upper side of the DCB substrate (the upper copper layer) suitably structured to form track conductors and connecting surfaces and is connected with the DCB substrate by soldering the contact surface(s) to the corresponding connecting surfaces of the DCB substrate. Connection (contacting) with the other semiconductor components arranged on the DCB substrate can be suitably effected either directly via track conductors or via bond wires. The DCB substrate is suitably connected with the circuit substrate of the circuit arrangement, e.g., soldered to this circuit substrate (e.g., a metal plate). Power dissipation of the passive components (particularly resistors) arranged on the ceramic substrate is removed via the ceramic substrate and the DCB substrate to the circuit substrate. During production, the ceramic substrates with the passive components (the resistors) can be soldered to the circuit substrate simultaneously to soldering the active semiconductor components and/or simultaneously to soldering the DCB substrate to the circuit substrate so that no separate process step is required. In other words, soldering the thick film circuit (passive components on ceramic substrate) can be executed simultaneously with soldering the active semiconductor components to the DCB substrate or simultaneously with soldering the active semiconductor components to the DCB substrate and the DCB substrate to the circuit substrate. [0012]
  • In addition to the components realized in thick film technology, other components (e.g., SMD components) can be mounted on the ceramic substrate and connected with the rest of the circuit arrangement by means of contact surfaces. [0013]
  • The advantages of said for manufacturing a power module are that [0014]
  • production complexity and thus cost of the power module are reduced by the simultaneously performed soldering process required for the passive components (the resistors) onto the active semiconductor components; [0015]
  • a simpler and more compact structure results due to the low number of connecting leads of the circuit arrangement and the reduced lead length of the possibly still present connecting leads; [0016]
  • overvoltages, and thus impairment of the functioning of the power module, are prevented due to the shorter lengths of the connecting leads and the reduced parasitic inductances.[0017]
  • Below, the inventive power module is described by means of an exemplary embodiment in conjunction with the drawing. The FIGURE shows a schematic view of the structure of the power module in a sectional drawing. [0018]
  • The power module's circuit arrangement [0019] 1 disposed, for example, on a circuit substrate 2 with the dimensions 99 mm×57 mm×3 mm comprises, for example, a plurality of power semiconductor components 11 (power transistors and power diodes) and a plurality of resistors 10 as shunts for measuring the transistor currents.
  • The carrier element provided for the power semiconductor components [0020] 11, which are implemented as semiconductor devices, and the resistors 10, which are realized in thick film technology, is a DCB substrate 3, which is composed of a first copper layer 32 (structured to form track conductors and connecting surfaces), a ceramic layer 31 formed as an oxide layer, and a second (unstructured) copper layer 33. The power semiconductor components 11, e.g., the power transistors and power diodes formed as semiconductor devices (semiconductor chips), are soldered to the connecting surfaces of the first copper layer 32 (i.e., to the upper side of the DCB substrate 3) by means of solder 15 and are mechanically connected by this soldering process with the DCB substrate 3 (of the first copper layer 32) (particularly for removal of their power dissipation) and are electrically conducted via bond wires 12. The resistors 10 from the resistor track 13, the two contact surfaces 14 laterally adjoining the resistor track 13 (metallizations), and a protective layer (passivation) (not depicted) are printed on a ceramic substrate 21. This ceramic substrate 21, using contact surfaces 14, is soldered to the connecting surfaces provided for this purpose on the upper side of DCB substrate 3 (first copper layer 32) (by means of solder 15). In production, this soldering process is preferably carried out simultaneously to soldering the power semiconductor components 11 onto DCB substrate 3 and DCB substrate 3 with the mounted active semiconductor components 11 and passive components 10 is subsequently soldered to circuit substrate 2, which is formed, for example, by a metallic copper plate.

Claims (5)

1. Power module with a circuit arrangement (1) provided with active semiconductor components (11) and passive components (10) and with a circuit substrate (2), whereby at least a portion of the active semiconductor components (11) are soldered to a DCB substrate (3) and at least a portion of the passive components (10) are printed in thick film technology on at least one ceramic substrate (21), and whereby the upper side (32) of the DCB substrate (3) is structured to form track conductors and connective surfaces for receiving the active semiconductor components (11) and the passive components (10) of the circuit arrangement (1), characterized in that,
for each passive component (10) provided, on a print side of the at least one ceramic substrate (21), a first print layer (13) determining the properties of the passive component (10) is printed in thick film technology and at least one contact surface (14) as an additional print layer laterally adjoining the first print layer (13);
and that the at least one ceramic substrate (21) is electrically connected via the at least one contact surface (14) with the corresponding contact surface(s) of the DCB substrate (3) by a soldered connection.
2. Power module according to claim 1 characterized in that additional components are mounted on the ceramic substrate (21).
3. Process for manufacturing a power module with a circuit arrangement (1) provided with active semiconductor components (11) and passive components (10) and with a circuit substrate (2), whereby at least a portion of the active semiconductor components (11) are soldered to a DCB substrate (3) and at least a portion of the passive components (10) are printed in thick film technology on at least one ceramic substrate (21) and whereby the upper side (32) of the DCB substrate (3) is structured to form track conductors and connecting surfaces for receiving the active semiconductor components (11) and the passive components (10) of the circuit arrangement (1), characterized in that,
for each passive component (10) provided, on a print side of the at least one ceramic substrate (21), a first print layer (13) determining the properties of the passive component (10) is printed in thick film technology and at least one contact surface (14) as additional print layer laterally adjoining the first print layer (13);
and that the at least one ceramic substrate (21) is electrically connected via the at least one contact surface (14) with the corresponding contact surface(s) of the DCB substrate (3) by soldering.
4. Process according to claim 1 characterized in that soldering of the ceramic substrate (21) is carried out simultaneously to soldering the active semiconductor components (11) to the DCB substrate (3) and/or simultaneously to soldering the DCB substrate (3) onto the circuit substrate (2).
5. Process according to claim 1 or 2 characterized in that additional components are mounted on the ceramic substrate (21).
US09/341,527 1997-01-14 1998-01-14 Power module with a circuit arrangement comprising active semiconductor components and passive components, and method for producing same Granted US20020008967A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19700963A DE19700963C2 (en) 1997-01-14 1997-01-14 Method for producing a power module with an active semiconductor component and a circuit arrangement having passive semiconductor components
DE19700963.8 1997-01-14

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DE19700963A1 (en) 1998-07-16
EP1008231A2 (en) 2000-06-14
WO1998032213A3 (en) 1999-03-18
JP2001508240A (en) 2001-06-19
WO1998032213A2 (en) 1998-07-23
US6344973B1 (en) 2002-02-05
DE19700963C2 (en) 2000-12-21

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